Wykaz publikacji wybranego autora

Maciej Kachel, mgr inż.

asystent

Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering
WEAIiIB-kmie

Identyfikatory Autora Informacje o Autorze w systemach zewnętrznych

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System Informacyjny AGH (SkOs)

1
  • 64 channel neural recording amplifier with tunable bandwidth in 180 nm CMOS technology
2
  • Analogue multiplexer for neural application in 180 nm CMOS technology
3
  • Design of 64-channel analogue multiplexer for neural application in CMOS 180 nm technology
4
  • Design of low power current/voltage reference source in CMOS $0.35\mu m$ technology
5
  • Integrated circuit with tunable bandwitdh for neural signal recording
6
  • Low noise 64-channel ASIC for AC and DC coupled strip detectors
7
  • Low noise multichannel ASIC for readout of SSD used in diffraction for powder and multilayer samples
8
  • Measurements and performance of a low noise 64-channel ASIC with CdTe strip detectors
9
  • Measurements of low noise 64 channel counting ASIC for Si and CdTe strip detectors
10
  • Micromagnetic properties of ${Co/Pt}$ multilayers deposited on various buffer layers
11
  • Performance of multichannel FX chip with DC coupled CDTE Schottky detector
12
13
  • Projekt wysokostabilnego źródla referencyjnego prądu w technologii CMOS
14
  • SXDR64 – multichannel low noise ASIC for CdTe and GaAs detectors
15
  • SXDR64 – Multichannel low noise ASIC for CdTe and GaAs detectors
16
  • The compressed baryonic matter experiment at FAIR: progress with feasibility studies and detector developments
17
  • VIPIC IC – design and test aspects of the 3D pixel chip